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https://catalog.uta.edu/coursedescriptions/cse/
CSE 5357. ADVANCED DIGITAL LOGIC DESIGN. 3 Hours. Hierarchical organization, design, simulation, implementation, and testing of digital systems. Industrial standard computer-aided design tools including hardware description languages (HDLs), field-programmable gate arrays (FPGAs), and other prototyping hardware and software will be employed.
https://catalog.uta.edu/coursedescriptions/ee/
EE 4334. PROGRAMMABLE LOGIC DESIGN. 3 Hours. Design of digital systems using programmable logic devices and high-level techniques. The course emphasizes the understanding of state-of-the-art hardware devices as well as design and simulation tools. Hardware description language will be taught and used for digital system design.
https://catalog.uah.edu/undergrad/course-descriptions/ee/
EE 202 - INTRO DIGITAL LOGIC DSGN. Semester Hours: 3. Engineering approaches to design and analysis of digital logic circuits. Boolean algebra, Karnaugh maps, design using Hardware Description Languages, digital computer building blocks, standard logic (SSI MSI) vs. programmable logic (PLD, PGA0, finite state machine design).
https://opencourses.emu.edu.tr/course/view.php?id=2
EENG115/INFE115 Introduction to Logic Design . This is core course of Electrical and Elecronic Engineering and Information System Engineering that presents basic tools for the design of digital circuits. It serves as a building block in many disciplines that utilize data of digital nature like digital control, data communication, digital computers etc.
https://catalog.utsa.edu/undergraduate/coursedescriptions/ee/
EE 4563. FPGA-Based System Design. (3-0) 3 Credit Hours. Prerequisites: EE 3463 and EE 3563. FPGAs replace digital circuits in most applications.
https://catalog.csun.edu/academics/ece/courses/
Topics include number systems, binary codes, Boolean algebra, combinational logic design, logic minimization techniques, sequential circuits design, arithmetic operations, data transfers using register transfer notation, memory devices, digital system organization and digital subsystems design. 3 hours lecture, one 3-hour lab per week.
https://docs.oracle.com/cd/E19396-01/819-0058/log_architect.html
Multitiered Architecture Design Java Enterprise System is well-suited for multitiered architecture design, where services are placed in tiers according to the functionality they provide. Each service is logically independent and can be accessed by services in either the same tier or a different tier. The following figure depicts a multitiered ...
https://www.brown.edu/Departments/Engineering/Courses/En163/working%20master1.17.pdf
Engineering 1630 - Digital Electronics System Design Semester I - 2017-18 The Student Lab Manual Wm. R. Patterson . ... Devices in this family supply small logic blocks for systems using power supply voltages less than the 5 volts that were standard for many years for TTL. (Most discrete logic today functions on
http://users.ece.utexas.edu/~mcdermot/vlsi1/main/lectures/lecture_1.pdf
§Prerequisites: A working knowledge of digital logic design (EE316), fundamentals of electronic circuits ( EE438) is required. §Textbook: Weste and Harris, CMOS VLSI Design: A Circuits and Systems Perspective, Addison Wesley/Pearson, 4th Edition, 2011 §Lectures and discussion in …
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